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A Prototype CMOS Optical Chip

Scatterings image

Photograph of electronic-photonic chip (multicolored patch at center). “Light rays” have been added by artist to emphasize the chip’s photonic communications functions. [Image: Glenn J. Asakawa, University of Colorado, Glenn.Asakawa@colorado.edu]

Scientists at three U.S. universities have built a prototype optical microprocessor system using standard silicon-based manufacturing methods (Nature, doi: 10.1038/nature16454). The chip integrates 850 photonic components with more than 70 million transistors.

According to the team of researchers from the University at California, Berkeley, the Massachusetts Institute of Technology, and the University of Colorado, Boulder, the chip contains a dual-core RISC-V microprocessor, 1 MB of random access memory, and electro-optic transmitters and receivers for communications via infrared light signals.

The scientists fabricated the complementary-metal-oxide-semiconductor (CMOS) chip with an existing 45-nm silicon-on-insulator (SOI) foundry process. Both the electronic transistors and the optical waveguide cores are located in the same crystalline silicon layer. The team selectively removed the substrate under the waveguides to minimize light leaks into the silicon substrate. The microprocessor and memory communicate via photonic signals at 2.5 Gbit/s. A field-programmable gate array gives the chip the functionality of a basic computer motherboard.

The team tested the chip's operation with an external distributed-feedback laser operating at 1,183 nm—a wavelength to which silicon is transparent. To validate the chip's information-processing functions, the researchers ran several programs on it, including one that rendered the three-dimensional image of a teapot.

In the supplementary information attached to their main article, the authors suggest several ways to improve the performance of their optoelectronic system. These include redesigning the modulator to expand bandwidth, boosting the receiver's sensitivity and operating the laser at the peak-efficiency power level. The team conducted its experiment with a much lower laser power level due to thermal considerations.

Publish Date: 30 December 2015

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